Smart mobile devices, including smartphones and tablets, continue to evolve with increased data communication rate, improved visual (screen/display) resolution and increased auditory (audio/sound) fidelity. In case of audio fidelity, several modern smart mobile devices claim very high fidelity due to incorporation of a 24-bit 192 kHz digital-to-analog converter (DAC), possibly with Signal-to-Noise Ratio, SNR>100 dB, Dynamic Range>100 dB and Total Harmonic Distortion+Noise (i.e. THD+N) of the order of 0.002% [13-15]. To ensure that these smart devices retain their overall (system) audio fidelity, the audio amplifier embodied therein likewise needs to feature commensurate high fidelity, including THD+N of the same order. Further, due to inevitable noise coupling between different modules (including said digital-to-analog converter) in the audio CODEC System-on-Chip, the said audio amplifier therein also needs to feature very high tolerance to noise in the supply rail (as qualified by high Power Supply Rejection Ratio (PSRR), for example PSRR>>80 dB, and low Power Supply induced Intermodulation Distortion (PS-IMD) [16, 17], for example PS-IMD<−90 dB), and low Electromagnetic Interference (EMI). Yet further, in view of the limited power resources in these mobile smart devices, it is highly desirable that said amplifier features high power-efficiency, for example power-efficiency, η>90%.
In view of the high power-efficiency requirement, it is not surprising that virtually all modern smart mobile devices embody a Class D Amplifier (CDA) [18-20] as the driver to a primary (‘speakerphone’) loudspeaker due to the unparalleled higher power-efficiency characteristics of CDAs over their linear counterparts. Nevertheless, CDAs are largely deficient in fidelity and noise immunity (to power supply noise). Specifically, CDAs typically suffer from drawbacks [1-4, 9-12] such as having relatively higher distortion, susceptibility to PSRR, and EMI in some cases. Existing methods adopted to mitigate the above drawbacks include, amongst others, employing a high carrier frequency (fsw) [5, 6], and/or adopting complex multiple feedback loops [7].
Unfortunately, those methods also undesirably have severe compromises. For example, using a high carrier frequency not only increases power dissipation of the amplifiers (hence reducing power-efficiency) but also increases the EMI emitted [8]. On the other hand, using complex multiple feedback loops increase both hardware complexity (thus necessitating a higher IC area for the necessary circuitries, with a corresponding increase in related costs) and quiescent power dissipation of the amplifiers (hence reducing power-efficiency). Consequently the CDAs may be rendered non-fully-integrated, if external components are also required.
Further, it is to be appreciated that existing CDAs are unable to provide attributes which qualify as “very-high-quality” (i.e. having THD+N<−80 dB and PSRR>80 dB) in the form of a non-Flip-Chip package, or as “ultra-high-quality” (i.e. having THD+N<−100 dB and PSRR>100 dB) in the form of a Flip-Chip or a non-Flip-Chip package. In this respect, it is thus accepted within the audio amplifiers and electronics (e.g. smartphone, tablet manufacturers and etc.) industries that there is a demand for CDAs with “very-high-quality” and/or “ultra-high-quality” attributes.
One object of the present invention is therefore to address at least one of the problems of the prior art and/or to provide a choice that is useful in the art.